Abstract
Tremendous advancements have been reported in the computer and
communication industries due to the high demands of big data analysis. This led to the
use of parallel and distributed processors to play a part. These parallel processors have
to be connected to a large number of memory modules. The connection between these
processors and memory modules must be highly reliable for efficient big data analysis.
Multistage interconnection networks (MIN) provide data communication between
processors and memory modules at efficient speed with reasonably high reliability.
This chapter provides a detailed introduction to MINs with their evolution and
characterization. Further in this chapter, the research trends among researchers about
various classes of MINs have also been discussed.