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Recent Advances in Electrical & Electronic Engineering

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ISSN (Print): 2352-0965
ISSN (Online): 2352-0973

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Research Article

Low-Power Approximate Arithmetic Circuits for IoT Devices

Author(s): Garima Thakur*, Harsh Sohal and Shruti Jain

Volume 15, Issue 5, 2022

Published on: 04 August, 2022

Page: [421 - 428] Pages: 8

DOI: 10.2174/2352096515666220627124337

Price: $65

Abstract

Aim: The aim of the study was to implement low-power approximate arithmetic circuits for IoT devices.

Background: Information transmitted via electronic media is exposed to security threats. With the advancement of internet technology, the devices linked to the internet are growing, leading to the Internet of Things (IoT).

Objective: IoT and big data are the prominent computing paradigms that employ approximate computing. It takes the benefit of various applications' error-tolerable features to lower the amount of resources necessary to deliver a specific degree of computation quality. An IoT device has to receive and transmit a lot of data. If this data size can be reduced by approximate computing, then a lot of power can be saved, which provides the dual benefit of data protection and power consumption.

Methods: The approximated adder and multiplier using AIF is proposed that helps in the reduction of power consumption and security threats that occur in IoT devices.

Results: The proposed approximated adder and multiplier consumes 2.81% to 32.95% less power as compared to conventional technique.

Conclusion: For the protection of data communication in IoT devices from security threats, approximate arithmetic circuits play a fundamental role. To attain this issue, in this paper, authors have proposed approximate adder and multiplier using AIF, which also provides reduction in power consumption. The proposed circuits can be used as a basic block for security purposes in IoT devices. In future, approximation algorithms will be implemented for mitigation of security threats.

Keywords: Approximate computing, security threats, IoT, approximate adder, approximate multiplier, AIF.

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[1]
"More than 30 billion devices will wirelessly connect to the internet of everything in 2020", Available from: www.abiresearch.com/press/more-than-30-billion-devices-willwirelessly-conne (Accessed on June 03, 2022).
[2]
T. Danova, "Morgan Stanley: 75 billion devices will be connected to the internet of things by 2020", Business Insider, 2013. Available from: www.businessinsider.com/75-billion-devices-will-be-connected-to-the (Accessed on June 03, 2022).
[3]
H. Jayakumar, K. Lee, W.S. Lee, A. Raha, Y. Kim, and V. Raghunathan, "Powering the internet of things", In Proceedings of the 2014 international symposium on Low power electronics and design (ISLPED 14), 2014, pp. 375-380.
[http://dx.doi.org/10.1145/2627369.2631644]
[4]
M. Gao, Q. Wang, A.S.K. Nagendra, and G. Qu, "A novel data format for approximate arithmetic computing", In 2017 22nd Asia and South Pacific Design Automation Conference (ASP-DAC), 2017, pp. 390-395.
[http://dx.doi.org/10.1109/ASPDAC.2017.7858354]
[5]
Q. Xu, T. Mytkowicz, and N.S. Kim, "Approximate computing: A survey", IEEE Des. Test, vol. 33, no. 1, pp. 8-22, 2016.
[http://dx.doi.org/10.1109/MDAT.2015.2505723]
[6]
H.R. Mahdiani, A. Ahmadi, S.M. Fakhraie, and C. Lucas, "Bio-inspired imprecise computational blocks for efficient VLSI implementation of soft-computing applications", IEEE Trans. Circuits Syst. I Regul. Pap., vol. 57, no. 4, pp. 850-862, 2010.
[http://dx.doi.org/10.1109/TCSI.2009.2027626]
[7]
G. Thakur, H. Sohal, and S. Jain, "A novel parallel prefix adder for optimized radix-2 FFT processor", Multidimens. Syst. Signal Process., vol. 32, no. 3, pp. 1041-1063, 2021.
[http://dx.doi.org/10.1007/s11045-021-00772-1]
[8]
R. Ye, T. Wang, F. Yuan, R. Kumar, and Q. Xu, "On reconfiguration-oriented approximate adder design and its application", In 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2013, pp. 48-54.
[http://dx.doi.org/10.1109/ICCAD.2013.6691096]
[9]
N. Zhu, W.L. Goh, W. Zhang, K.S. Yeo, and Z.H. Kong, "Design of low-power high-speed truncation-error-tolerant adder and its application in digital signal processing", IEEE Trans. Very Large Scale Integr. Syst., vol. 18, no. 8, pp. 1225-1229, 2010.
[http://dx.doi.org/10.1109/TVLSI.2009.2020591]
[10]
G. Thakur, H. Sohal, and S. Jain, "A novel ASIC-based variable latency speculative parallel prefix adder for image processing application", Circuits Syst. Signal Process., vol. 40, no. 11, pp. 5682-5704, 2021.
[http://dx.doi.org/10.1007/s00034-021-01741-6]
[11]
S. Hashemi, R.I. Bahar, and S. Reda, "DRUM: A dynamic range unbiased multiplier for approximate applications", In 2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2015, pp. 418-425.
[http://dx.doi.org/10.1109/ICCAD.2015.7372600]
[12]
G. Qu, and L. Yuan, "Design things for the internet of things - An EDA perspective", In 2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2014, pp. 411-416.
[http://dx.doi.org/10.1109/ICCAD.2014.7001384]
[13]
M. Gao, Q. Wang, M.T. Arafin, Y. Lyu, and G. Qu, "Approximate computing for low power and security in the internet of things", Computer, vol. 50, no. 6, pp. 27-34, 2017.
[http://dx.doi.org/10.1109/MC.2017.176]
[14]
A. Mironova, P. Mercorelli, and A. Zedler, "A multi input sliding mode control for peltier cells using a cold-hot sliding surface", J. Franklin Inst., vol. 355, no. 18, pp. 9351-9373, 2018.
[http://dx.doi.org/10.1016/j.jfranklin.2017.10.033]

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