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Nanoscience & Nanotechnology-Asia

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ISSN (Online): 2210-6820

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Review Article

Memristor and its Applications: A Comprehensive Review

Author(s): T.A. Anusudha, S.S. Reka* and S.R.S. Prabaharan

Volume 10, Issue 5, 2020

Page: [558 - 576] Pages: 19

DOI: 10.2174/2210681209666190626105254

Price: $65

Abstract

The emergence of memristor offers new avenues to look at several potential applications ranging from non-volatile memories to neuromorphic system. A typical sign of the physical memristor device is Pinched Hysteresis Loop. In the aspect of accomplishing this loop with high accuracy, several memristor models have been evolved in the past. Moreover, various mathematical window functions have been developed from the researchers to throw more insight into the memristor model with the accordance of enhancing the degree of nonlinearity, resolving boundary effect and boundary lock. This review portrays a brief description of explored memristor models and window functions. With this, a comprehensive analysis is made to depict the advantages and disadvantages in a more explicit manner. Furthermore, this work exhibits the prevailing properties of memristor and the different types of switching mechanisms. Here, the future perspective of the memristive technology is also explored very well as the memristor has become an innovative candidate in the memory technology over the semiconductor. Memristor-based potential applications such as a fine resolution programmable gain amplifier, synapse, and logic gate are also explained briefly.

Keywords: Memristor, pinched hysteresis loop, dynamic negative differential resistance, boundary lock, window functions, EEPROM.

Graphical Abstract

[1]
Perez, T.; De Rose, C.A.F. Non-volatile memory: Emerging technologies and their impacts on memory systems. Technical Report; Pontifical Catholic University of Rio Grande do Sul, 2015.
[2]
Raoux, S.; Burr, G. W.; Breitwisch, M. J.; Rettner, C.T.; Chen, Y.-C.; Shelby, R. M.; Salinga, M.; Krebs, D.; Chen, S.-H.; Lung, H.-L. Phase-change random access memory: A scalable technology. IBM J. Res. Dev, 2008, 52(4.5), 465-479.
[http://dx.doi.org/10.1147/rd.524.0465]
[3]
Chua, L. Memristor - the missing circuit element. IEEE Trans. Circuit Theory, 1971, 18(5), 507-519.
[http://dx.doi.org/10.1109/TCT.1971.1083337]
[4]
Gallagher, W.J.; Parkin, S.S.P. Development of the magnetic tunnel junction MRAM at IBM: From first junctions to a 16-Mb MRAM demonstrator chip. IBM J. Res. Develop., 2006, 50(1), 5-23.
[http://dx.doi.org/10.1147/rd.501.0005]
[5]
Liaw, C.; Kund, M.; Schmitt-Landsiedel, D.; Ruge, I. The conductive bridging random access memory (CBRAM): A non-volatile multi- level memory technology. Proceedings of the 37th European Solid-State Device Research Conference, Munich, GermanySeptember 11-13, 2007
[6]
Kozicki, M.N.; Barnaby, H.J. Conductive bridging random access memory — materials, devices and applications. Semicond. Sci. Technol., 2016, 31(11), 54.
[7]
Wang, L.; Yang, C.H.; Wen, J.; Gai, S.; Peng, Y.X. Overview of emerging memristor families from resistive memristor to spintronic memristor. J. Mater. Sci. Mater. Electron., 2015, 26(7), 4618-4628.
[http://dx.doi.org/10.1007/s10854-015-2848-z]
[8]
Erokhin, V. Organic memristors: Basic principles. Proceedings of 2010 IEEE International Symposium on Circuits and Systems, Paris, France30 May-2 June 2010
[9]
Sun, J.P.; Haddad, G.I.; Mazumder, P.; Schulman, J.N. Resonant tunneling diodes: Models and properties. Proc. IEEE, 1998, 86(4), 641-660.
[http://dx.doi.org/10.1109/5.663541]
[10]
Wu, M.L.; Yang, C.P.; Shi, D.W.; Wang, R.L.; Xu, L.F.; Xiao, H.B.; Baerner, K. Electric-pulse-induced resistance switching effect in the bulk of La 0.5Ca0.5MnO3 ceramics. AIP Adv., 2014, 4(4), 1-7.
[http://dx.doi.org/10.1063/1.4872216]
[11]
Chanthbouala, A.; Garcia, V.; Cherifi, R.O.; Bouzehouane, K.; Fusil, S.; Moya, X.; Xavier, S.; Yamada, H.; Deranlot, C.; Mathur, N.D.; Bibes, M.; Barthélémy, A.; Grollier, J. A ferroelectric memristor. Nat. Mater., 2012, 11(10), 860-864.
[http://dx.doi.org/10.1038/nmat3415] [PMID: 22983431]
[12]
Wang, X.; Chen, Y.; Xi, H.; Li, H.; Dimitrov, D. Spintronic memristor through spin-torque-induced magnetization. Motion, 2009, 30(3), 294-297.
[13]
Kryder, M.H.; Kim, C.S. After hard drives — What comes next? IEEE Trans. Magn., 2009, 45(10), 3406-3413.
[http://dx.doi.org/10.1109/TMAG.2009.2024163]
[14]
Babacan, Y.; Kaçar, F. Memristor emulator with spike-timing-dependent-plasticity. AEUE - Int. J. Electron. Commun., 2017, 73, 16-22.
[15]
Sánchez-López, C.; Carrasco-Aguilar, M.A.; Muñiz-Montero, C.A. 16 Hz-160 KHz memristor emulator circuit. AEU Int. J. Electron. Commun., 2015, 69(9), 1208-1219.
[http://dx.doi.org/10.1016/j.aeue.2015.05.003]
[16]
Sánchez-López, C.L.E.A-C.A. 860 KHz grounded memristor emulator circuit. Int. J. Electron. Commun., 2017, 73, 23-33.
[http://dx.doi.org/10.1016/j.aeue.2016.12.015]
[17]
Sozen, H.; Cam, U. First-order memristor–capacitor filter circuits employing Hp mristor. J. Circuits Syst. Comput., 2014, 23(08)1450116
[http://dx.doi.org/10.1142/S0218126614501163]
[18]
Naous, R.; Alshedivat, M.; Neftci, E.; Cauwenberghs, G.; Salama, K.N.; Naous, R.; Alshedivat, M.; Neftci, E.; Cauwenberghs, G. Memristor-based neural networks. Synaptic vs. Neuronal Stochastic., 2016, 2017111304
[19]
Ntinas, V.; Vourkas, I.; Abusleme, A.; Sirakoulis, G.C.; Rubio, A. Experimental study of artificial neural networks using a digital memristor simulator. IEEE Trans. Neural Netw. Learn. Syst., 2018, 29(10), 5098-5110.
[http://dx.doi.org/10.1109/TNNLS.2018.2791458] [PMID: 29994426]
[20]
Adhikari, S.P.; Kim, H.; Budhathoki, R.K.; Yang, C.; Chua, L.O. A circuit-based learning architecture for multilayer neural networks with memristor bridge synapses. IEEE Trans. Circuits Syst. I Regul. Pap., 2015, 62(1), 215-223.
[http://dx.doi.org/10.1109/TCSI.2014.2359717]
[21]
Electron, I.J.; Aeü, C.; Tarkhan, M.; Maymandi-nejad, M. Design of a memristor based fuzzy processor. Int. J. Electron. Commun., 2018, 84, 331-341.
[http://dx.doi.org/10.1016/j.aeue.2017.10.039]
[22]
Pan, F.; Chen, C.; Wang, Z.; Yang, Y.; Yang, J.; Zeng, F. Mechanisms and challenges. Prog. Nat. Sci. Mater. Int., 2010, 20, 1-15.
[http://dx.doi.org/10.1016/S1002-0071(12)60001-X]
[23]
Vourkas, I.; Sirakoulis, G.C. Emerging memristor-based logic circuit design approaches: A review. IEEE Circuits Syst. Mag., 2016, 16(3), 15-30.
[http://dx.doi.org/10.1109/MCAS.2016.2583673]
[24]
Wang, H.P.; Lin, C.C.; Wu, C.C.; Chen, Y.C.; Wang, C.Y. On synthesizing memristor-based logic circuits with minimal operational pulses. IEEE Trans. Very Large Scale Integr. (VLSI). Syst., 2018, 99, 1-11.
[http://dx.doi.org/10.1109/TVLSI.2018.2816023]
[25]
Soliman, N.S.; Fouda, M.E.; Radwan, A.G. Memristor-CNTFET based ternary logic gates. Microelectron J., 2018, 72, 74-85.
[http://dx.doi.org/10.1016/j.mejo.2017.12.008]
[26]
Li, C.; Hu, M.; Li, Y.; Jiang, H.; Ge, N.; Montgomery, E.; Zhang, J.; Song, W.; Dávila, N.; Graves, C.E. Analogue signal and image processing with large memristor crossbars. Nat. Electron., 2017, 1, 52-59.
[27]
Strukov, D.B.; Snider, G.S.; Stewart, D.R.; Williams, R.S. The missing memristor found. Nature, 2008, 453(7191), 80-83.
[http://dx.doi.org/10.1038/nature06932] [PMID: 18451858]
[28]
Chua, L.O.; Kang, S.M. Memristive devices and systems., IEEE,. 1976, 64(2), 209-223.
[http://dx.doi.org//10.1109/PROC.1976.10092]
[29]
Oblea, A.S.; Timilsina, A.; Moore, D.; Campbell, K.A. Silver Chalcogenide Based Memristor Devices. Proceedings of the 2010 International Joint Conference on Neural Networks (IJCNN), Barcelona, Spain 18-23 July 2010.
[http://dx.doi.org//ieeexplore.ieee.org/document/5596775]
[30]
Wagenaar, J.J.T.; Morales-Masis, M.; Van Ruitenbeek, J.M. Observing quantized conductance steps in silver sulfide: Two parallel resistive switching mechanisms. J. Appl. Phys., 2012, 111(1)014302
[http://dx.doi.org/10.1063/1.3672824]
[31]
Xu, Z.T.; Jin, K.J.; Gu, L.; Jin, Y.L.; Ge, C.; Wang, C.; Guo, H.Z.; Lu, H.B.; Zhao, R.Q.; Yang, G.Z. Evidence for a crucial role played by oxygen vacancies in LaMnO3 resistive switching memories. Small, 2012, 8(8), 1279-1284.
[http://dx.doi.org/10.1002/smll.201101796] [PMID: 22351297]
[32]
Kim, H.D.; An, H.M.; Sung, Y.M.; Im, H.; Kim, T.G. Bipolar resistive-switching phenomena and resistive-switching mechanisms observed in zirconium nitride-based resistive-switching memory cells. IEEE Trans. Device Mater. Reliab., 2013, 13(1), 252-257.
[http://dx.doi.org/10.1109/TDMR.2012.2237404]
[33]
Sun, J.; Liu, Q.; Xie, H.; Wu, X.; Xu, F. In situ observation of nickel as an oxidizable electrode material for the solid-electrolyte-based resistive random access memory. Appl. Phys. Lett., 2013, 102(5)053502
[34]
Wang, Z.; Zhu, W.G.; Du, A.Y.; Wu, L.; Fang, Z.; Tran, X.A.; Liu, W.J.; Zhang, K.L.; Yu, H.Y. Highly uniform, self-compliance, and forming-free ALD HfO2-based RRAM with Ge doping. IEEE Trans. Electron Dev., 2012, 59(4), 1203-1208.
[http://dx.doi.org/10.1109/TED.2012.2182770]
[35]
H-S., Philip Wong B.; Raoux, S.; Kim, S.; Liang, J.; Reifenberg, J. P.; Rajendran, B.; Member, I.; Asheghi, M.; Goodson, K. E. Phase change memory. Proc. IEEE, 2010, 98(12), 2201-2227.
[36]
Lee, M.J.; Lee, C.B.; Lee, D.; Lee, S.R.; Chang, M.; Hur, J.H.; Kim, Y.B.; Kim, C.J.; Seo, D.H.; Seo, S.; Chung, U.I.; Yoo, I.K.; Kim, K. A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O(5-x)/TaO(2-x) bilayer structures. Nat. Mater., 2011, 10(8), 625-630.
[http://dx.doi.org/10.1038/nmat3070] [PMID: 21743450]
[37]
Johnson, S.L.; Sundararajan, A.; Hunley, D.P.; Strachan, D.R. Memristive switching of single-component metallic nanowires. Nanotechnology, 2010, 21(12)125204
[http://dx.doi.org/10.1088/0957-4484/21/12/125204] [PMID: 20203360]
[38]
Bae, S.H.; Lee, S.; Koo, H.; Lin, L.; Jo, B.H.; Park, C.; Wang, Z.L. The memristive properties of a single VO2 nanowire with switching controlled by self-heating. Adv. Mater., 2013, 25(36), 5098-5103.
[http://dx.doi.org/10.1002/adma.201302511] [PMID: 23913309]
[39]
Yalon, E.; Gavrilov, A.; Cohen, S.; Mistele, D.; Meyler, B.; Salzman, J.; Ritter, D. Resistive switching in HfO2 probed by a metal-insulator- semiconductor bipolar transistor. IEEE Electron Device Lett., 2012, 33(1), 11-13.
[http://dx.doi.org/10.1109/LED.2011.2171317]
[40]
Kavehei, O.; Cho, K.; Lee, S.; Kim, S.J.; Al-Sarawi, S.; Abbott, D.; Eshraghian, K. Fabrication and modeling of Ag/TiO2/ITO memristor. Midwest Symposium on Circuits and Systems, Seoul, South Korea 7-10 Aug.2011.
[41]
Wei, L.L.; Wang, J.; Chen, Y.S.; Shang, D.S.; Sun, Z.G.; Shen, B.G.; Sun, J.R. Pulse-induced alternation from bipolar resistive switching to unipolar resistive switching in the Ag/AgOx/M g0.2Zn0.8O/Pt device. J. Phys. D Appl. Phys., 2012, 45(42), 3-8.
[http://dx.doi.org/10.1088/0022-3727/45/42/425303]
[42]
Teixeira, J.M.; Ventura, J.; Fermento, R.; Araujo, J.P.; Sousa, J.B.; Wisniowski, P.; Freitas, P.P. Electroforming, magnetic and resistive switching in MgO-based tunnel junctions. J. Phys. D Appl. Phys., 2009, 42(10), 1.
[http://dx.doi.org/10.1088/0022-3727/42/10/105407]
[43]
Chua, L. Resistance switching memories are memristors. Appl. Phys., A Mater. Sci. Process., 2011, 102(4), 765-783.
[http://dx.doi.org/10.1007/s00339-011-6264-9]
[44]
Chua, L.O. The fourth element. Proc. IEEE, 2012, 100(6), 1920-1927.
[http://dx.doi.org/10.1109/JPROC.2012.2190814]
[45]
Saraju, P. Mohanty. Memristor: From basics to deployment. IEEE Potentials, 2017, 32, 34-39.
[46]
Muthuswamy, B. Memristor based chaotic circuits. IETE Tech. Rev., 2009, 26(6), 1-16.
[http://dx.doi.org/10.4103/0256-4602.57827]
[47]
Tan, Z.P.; Zeng, Y.C.; Li, Z.J.; Hong, Q.H. Implementation of a new memristor based chaotic circuit. WIT Transac. Inform. Commun. Technol., 2014, 60, 503-510.
[http://dx.doi.org/10.2495/CTA140621]
[48]
Hu, Q.; Yu, Y.; Men, L.; Lei, F.; Zhang, H. Memristor-based chaotic circuit design on image en/decryption. Proceedings of the 31st Youth Academic Annual Conference of Chinese Association of Automation , Wuhan, China, 11-13 Nov.2016.
[49]
Jin, P.; Wang, G.; Iu, H.H.C.; Fernando, T. A Locally active memristor and its application in a chaotic circuit. IEEE Trans. Circuits Syst., II Express Briefs, 2018, 65(2), 246-250.
[http://dx.doi.org/10.1109/TCSII.2017.2735448]
[50]
Iu, H.H.C.; Yu, D.S.; Fitch, A.L.; Sreeram, V.; Chen, H. Controlling chaos in a memristor based circuit using a twin-t notch filter. Circuits Syst. I Regul. Pap. IEEE Trans., 2011, 58(6), 1337-1344.
[51]
Xu, Q.; Zhang, Q.; Bao, B.; Hu, Y. Non-autonomous second-order memristive chaotic circuit. IEEE Access, 2017, 5, 21039-21045.
[http://dx.doi.org/10.1109/ACCESS.2017.2727522]
[52]
Lin, Z.; Wang, H. Image encryption based on chaos with pwl memristor in Chua’s circuit. Proceedings of the International Conference on Communications, Circuits and Systems , , Milpitas, CA, USA, 23-25 July2009.
[53]
Driscoll, T.; Quinn, J.; Klein, S.; Kim, H.T.; Kim, B.J.; Pershin, Y.V.; Di Ventra, M.; Basov, D.N. Memristive adaptive filters. Appl. Phys. Lett., 2010, 97(9), 093502-093503.
[http://dx.doi.org/10.1063/1.3485060]
[54]
Corinto, F.; Ascoli, A. Memristive diode bridge with LCR filter. Electron. Lett., 2012, 48(14), 824-825.
[http://dx.doi.org/10.1049/el.2012.1480]
[55]
Witrisal, K. Memristor-based stored-reference receiver–the UWB solution? Electron. Lett., 2009, 45(14), 713-714.
[http://dx.doi.org/10.1049/el.2009.0123]
[56]
Yu, Q.; Qin, Z.; Yu, J.; Mao, Y. Transmission characteristics study of memristors based op-amp circuits. Proceeding of the International Conference on Communications, Circuits and Systems , Milpitas, CA, USA, 23-25 July 2009.
[57]
Smaili, S.; Massoud, Y. Studying the effect of memristor state variability on the gain of memristor-based tunable amplifiers.IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS). Columbus, OH, USA, 4-7 Aug. 2013.
[http://dx.doi.org/10.1109/MWSCAS.2013.6674798]
[58]
Driscoll, T.; Kim, H.T.; Chae, B.G.; Kim, B.J.; Lee, Y.W.; Jokerst, N.M.; Palit, S.; Smith, D.R.; Di Ventra, M.; Basov, D.N. Memory metamaterials. Science, 2009, 325(5947), 1518-1521.
[http://dx.doi.org/10.1126/science.1176580] [PMID: 19696311]
[59]
Chen, Q.; Wang, X.; Wan, H.; Yang, R. A logic circuit design for perfecting memristor-based material implication. IEEE Trans. Comput. Des. Integr. Circuits Syst., 2017, 36(2), 279-284.
[http://dx.doi.org/10.1109/TCAD.2016.2578881]
[60]
Delgado, A. Input - output linearization of memristive systems. IEEE Nanotechnol. Mater. Devices Conf.2009, 154,, , pp. 154-157.
[http://dx.doi.org/10.1109/NMDC.2009.5167523]
[61]
Shin, S.S.S.; Kim, K.K.K.; Kang, S-M.K.S-M. Memristor-based fine resolution programmable resistance and its applications. Proceedings of the International Conference on Communications, Circuits and Systems, Milpitas, CA, USA, 23-25 July2009.
[http://dx.doi.org/10.1109/ICCCAS.2009.5250376]
[62]
Wang, G.; Bai, D.; Wang, X. Digital model of TiO2 memristor for field-programmable gate array. J. Eng. (Stevenage), 2014, 2014(3), 90-92.
[http://dx.doi.org/10.1049/joe.2013.0183]
[63]
Sampath, M.; Mane, P.S.; Ramesha, C.K. Hybrid CMOSmemristor based FPGA architecture. Int. Conf. VLSI Sys. Architect. Technol. Applicat., 2015, 2015, 1-6.
[64]
Turkyilmaz, O.; Onkaraiah, S.; Reyboz, M.; Clermidy, F. Hraziia; Anghel, C.; Portal, J. M.; Bocquet, M. RRAM-based FPGA for “Normally Off, Instantly On” applications. J. Parallel Distrib. Comput., 2014, 74(6), 2441-2451.
[http://dx.doi.org/10.1016/j.jpdc.2013.08.003]
[65]
Kulkarni, M.S.; Teuscher, C. Memristor-based reservoir computing. EEE/ACM International Symposium on Nanoscale Architectures (NANOARCH, Amsterdam, Netherlands, 4-6 July. 2012.
[http://dx.doi.org/10.1145/2765491.2765531]
[66]
Wey, T.A.; Benderli, S. Amplitude modulator circuit featuring TiO2 memristor with linear dopant drift. Electron. Lett., 2009, 45(22), 1103.
[http://dx.doi.org/10.1049/el.2009.2174]
[67]
Chen, W.; Yang, X.; Wang, F. Memristor content addressable memory. Proceeding of the IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH), Paris, France 8-10, July,2014.
[68]
Rose, G.S.; Rajendran, J.; McDonald, N.; Karri, R.; Potkonjak, M.; Wysocki, B. Hardware security strategies exploiting nanoelectronic circuits. Proceeding of the 18th Asia and South Pacific Design Automation Conference (ASP-DAC), Yokohama, Japan , 22-25 January,2013.
[http://dx.doi.org/10.1109/ASPDAC.2013.6509623]
[69]
Sklyar, R. Analytical treatment of the signal propagation in an EM Transistor/Memristor (EMTM). Nonlinear Dyn. Synchron., 2009, 2009, 116-120.
[70]
Du, C.; Cai, F.; Zidan, M.A.; Ma, W.; Lee, S.H.; Lu, W.D. Reservoir computing using dynamic memristors for temporal information processing. Nat. Commun., 2017, 8(1), 2204.
[http://dx.doi.org/10.1038/s41467-017-02337-y] [PMID: 29259188]
[71]
Lee, H.Y.; Chen, P.S.; Wu, T.Y.; Chen, Y.S.; Wang, C.C.; Tzeng, P.J.; Lin, C.H.; Chen, F.; Lien, C.H.; Tsai, M.J. Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM. Proceedings of the IEEE International Electron Devices Meeting, San Francisco, CA, USA 15-17 December,2008.
[http://dx.doi.org/10.1109/IEDM.2008.4796677]
[72]
Yang, J.J.; Pickett, M.D.; Li, X.; Ohlberg, D.A.A.; Stewart, D.R.; Williams, R.S. Memristive switching mechanism for metal/oxide/metal nanodevices. Nat. Nanotechnol., 2008, 3(7), 429-433.
[http://dx.doi.org/10.1038/nnano.2008.160] [PMID: 18654568]
[73]
Pickett, M.D.; Strukov, D.B.; Borghetti, J.L.; Yang, J.J.; Snider, G.S.; Stewart, D.R.; Williams, R.S. Switching dynamics in titanium dioxide memristive devices. J. Appl. Phys., 2009, 106(7), 1-6.
[http://dx.doi.org/10.1063/1.3236506]
[74]
Kvatinsky, S.; Friedman, E.G.; Kolodny, A.; Weiser, U.C. TEAM: Threshold adaptive memristor model. IEEE Trans. Circuits Syst. I Regul. Pap., 2013, 60(1), 211-221.
[http://dx.doi.org/10.1109/TCSI.2012.2215714]
[75]
Kvatinsky, S.; Ramadan, M.; Friedman, E.G.; Kolodny, A. VTEAM : A general model for voltage controlled memristors. IEEE Trans. Circuits Syst., II Express Briefs, 2015, 62(8), 786-790.
[http://dx.doi.org/10.1109/TCSII.2015.2433536]
[76]
Yakopcic, C.; Taha, T.M.; Subramanyam, G.; Pino, R.E.; Rogers, S. A memristor device model. IEEE Electron Device Lett., 2011, 32(10), 1436-1438.
[http://dx.doi.org/10.1109/LED.2011.2163292]
[77]
Biolek, D.; Biolkova, V.; Kolka, Z. Modified MIM model of titanium dioxide memristor for reliable simulations in SPICE. Proceeding of the 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design, Giardini Naxos, Italy 12-15 June,2017.
[http://dx.doi.org/10.1109/SMACD.2017.7981564]
[78]
Wainstein, N.; Kvatinsky, S. A lumped RF model for nanoscale memristive devices and non-volatile single-pole double-throw switches. IEEE Trans. NanoTechnol., 2018, 17(5), 873-883.
[79]
Hisham, A.; Pickett, M.D. SPICE modeling of memristors. Proceeding of the IEEE International Symposium of Circuits and Systems (ISCAS), 15-18 May, , 2011.
[80]
Elgabra, H.; Farhat, I.A.H.; Al Hosani, A.S.; Homouz, D.; Mohammad, B. Mathematical modeling of a memristor device. Int. Conf. Innovat. Inform. Technol.,2012,, 2012, pp. 156-161.
[81]
Yakopcic, C.; Taha, T.M.; Subramanyam, G.; Pino, R.E. Memristor SPICE model and crossbar simulation based on devices with nanosecond switching time. Proc. Int. Jt. Conf. Neural Netw., 2013, 2013, 1-7.
[http://dx.doi.org/10.1109/IJCNN.2013.6706773]
[82]
Rak, Á. ́; Cserey, G. Macromodeling of the memristor in SPICE. IEEE Trans. Comput. Des. Integr. Circuits Syst., 2010, 29(4), 632-636.
[http://dx.doi.org/10.1109/TCAD.2010.2042900]
[83]
Batas, D.; Fiedler, H. A memristor SPICE implementation and a new approach for magnetic flux-controlled memristor modeling. IEEE Trans. NanoTechnol., 2011, 10(2), 250-255.
[http://dx.doi.org/10.1109/TNANO.2009.2038051]
[84]
Benderli, S.; Wey, T.A. On SPICE Macromodelling of TiO2 memristors. Electron. Lett., 2009, 45(7), 377.
[http://dx.doi.org/10.1049/el.2009.3511]
[85]
Mahvash, M.; Parker, A.C. A memristor SPICE model for designing memristor circuits. Midwest Symp. Circuits Sys., 2010, 2010, 989-992.
[http://dx.doi.org/10.1109/MWSCAS.2010.5548803]
[86]
Kvatinsky, S.; Talisveyberg, K.; Fliter, D.; Friedman, E.G.; Kolodny, A.; Weiser, U.C.Verilog-A for Memristor Models, 2011. Available from: https://asic2.group/wp-content/uploads/2017/06/VerilogA-models-technical-report.pdf
[87]
Kvatinsky, S.; Talisveyberg, K.; Fliter, D.; Kolodny, A.; Weiser, U.C.; Friedman, E.G. Models of memristors for SPICE simulations. IEEE Convent. Electrical Electron. Engin. Israel, 2012, 2012, 1-5.
[http://dx.doi.org/10.1109/EEEI.2012.6377081]
[88]
Zaplatilek, K. Memristor modeling in MATLAB & simulink. Proc. European Comput. Conf.2011,, 2011, pp. 62-67.
[89]
Soman, P.; Sonkusare, R. Memristor modeling using finite element and. Int. J. Ind. Electron. Electr. Eng., 2015, 3(3), 9-13.
[90]
Kim, S.; Choi, S.; Lu, W. Comprehensive physical model of dynamic resistive switching in an oxide memristor. ACS Nano, 2014, 8(3), 2369-2376.
[http://dx.doi.org/10.1021/nn405827t] [PMID: 24571386]
[91]
Joglekar, Y.N.; Wolf, S.J. The elusive memristor: Properties of basic electrical circuits. Eur. J. Phys., 2009, 30(4), 661-675.
[http://dx.doi.org/10.1088/0143-0807/30/4/001]
[92]
Biolek, Z.; Biolek, D.; Biolková, V. SPICE model of memristor with nonlinear dopant drift. Wuxiandian Gongcheng, 2009, 18(2), 210-214.
[93]
Prodromakis, T.; Peh, B.P.; Papavassiliou, C.; Toumazou, C. A versatile memristor model with nonlinear dopant kinetics. IEEE Trans. Electron Dev., 2011, 58(9), 3099-3105.
[http://dx.doi.org/10.1109/TED.2011.2158004]
[94]
Corinto, F.; Ascoli, A. A boundary condition-based approach to the modeling of memristor nanostructures. IEEE Trans. Circuits Syst. I Regul. Pap., 2012, 59(11), 2713-2726.
[http://dx.doi.org/10.1109/TCSI.2012.2190563]
[95]
Yu, J.; Mu, X.; Xi, X.; Wang, S. A memristor model with piecewise window function. Wuxiandian Gongcheng, 2013, 22(4), 969-974.
[96]
Zha, J.; Huang, H.; Huang, T.; Cao, J.; Alsaedi, A.; Neurocomputing, A. General memristor model and its applications in programmable analog circuits. Neurocomputing, 2017, 267, 134-140.
[http://dx.doi.org/10.1016/j.neucom.2017.04.057]
[97]
Zha, J.; Huang, H.; Liu, Y. A novel window function for memristor model with application in programming analog circuits. IEEE Trans. Circuits Syst., II Express Briefs, 2016, 63(5), 423-427.
[http://dx.doi.org/10.1109/TCSII.2015.2505959]
[98]
Anusudha, T.A.; Prabaharan, S.R.S. A versatile window function for linear ion drift memristor model – A new approach. Int. J. Electron. Commun., 2018, 90, 130-139.
[http://dx.doi.org/10.1016/j.aeue.2018.04.020]
[99]
Abdel-Kader, R.F.; Abuelenin, S.M. Memristor model based on fuzzy window function. Proceeding of the IEEE International Conference on Fuzzy Systems (FUZZ-IEEE), Istanbul, Turkey 2-5 August,2015.
[http://dx.doi.org/10.1109/FUZZ-IEEE.2015.7338105]
[100]
Brambilla, A.; Gruosso, G.; Redaelli, M.; Gajani, G.S. Related to ultra high step down non-pulsating output current. Int. J. Circuit Theory Appl., 2010, 38(7), 689-708.
[http://dx.doi.org/10.1002/cta.597]
[101]
Halawani, Y.; Member, S.; Mohammad, B.; Member, S.; Al-qutayri, M.; Member, S.; Al-sarawi, S.F. Memristor-based hardware accelerator for image compression. IEEE Trans. Very Large Scale Integr. (VLSI). Syst., 2018, 99, 1-10.
[102]
Xia, Q.; Robinett, W.; Cumbie, M.W.; Banerjee, N.; Cardinali, T.J.; Yang, J.J.; Wu, W.; Li, X.; Tong, W.M.; Strukov, D.B.; Snider, G.S.; Medeiros-Ribeiro, G.; Williams, R.S. Memristor-CMOS hybrid integrated circuits for reconfigurable logic. Nano Lett., 2009, 9(10), 3640-3645.
[http://dx.doi.org/10.1021/nl901874j] [PMID: 19722537]
[103]
Rothenbuhler, A.; Tran, T.; Smith, E.; Saxena, V.; Campbell, K. Reconfigurable threshold logic gates using memristive devices. J. Low Power Electron. Appl., 2013, 3(2), 174-193.
[http://dx.doi.org/10.3390/jlpea3020174]
[104]
Jahromi, M.R.; Shamsi, J.; Amirsoleimani, A.; Mohammadi, K.; Ahmadi, M. Ultra-low power op-amp design with memristor-based compensation. Canadian Conf. Electrical Comput. Eng., 2017, 3, 2-5.
[http://dx.doi.org/10.1109/CCECE.2017.7946785]
[105]
Ascoli, A.; Tetzlaff, R.; Corinto, F.; Mirchev, M.; Gilli, M. Memristor-based filtering applications. IEEE Latin-American Test Workshop 2013,, 2013, p. 1-6..
[http://dx.doi.org/10.1109/LATW.2013.6562672]
[106]
James, A.P.; Tolegen, Y.; Nandakumar, A. Frequency analysis of memristor based low pass bessel filter. Proc. Int. Conf. Comput. Network Commun.2018,, 2018, pp. 185-189.
[http://dx.doi.org/10.1109/CoCoNet.2018.8476879]
[107]
Sahin, M.E.; Guler, H. The design of memristor based high pass filter circuit. IEEE Int. Conf. Electronics Circuits Syst 2018,, 2018, pp. 494-497.
[108]
Li, Y.; Yang, C.; Yu, Y.; Diez, F.F. Research on low pass filter based on memristor and memcapacitor. Chinese Control Conf. 2017,, 2017, pp. 5110-5113.
[http://dx.doi.org/10.23919/ChiCC.2017.8028162]
[109]
Wang, W.; Yu, Q.; Xu, C.Y.C. Study of filter characteristics based on PWL memristor. Int. Conf. Commun. Circuits Sys. 2009,, 2009, pp. 969-973.
[http://dx.doi.org//10.1109/ICCCAS.2009.5250355]
[110]
Ali, S.; Hassan, A.; Hassan, G.; Bae, J.; Lee, C.H. Memristor-capacitor passive filters to tune both cut-off frequency and bandwidth. Optical Fiber Sensors Conf.2017,, 2017, pp. 1-4.
[111]
Yener, Ş.Ç.; Mutlu, R.; Kuntman, H.H. Examination of a memristor-based low-pass filter topology. Int. Conf. Electrical Electron. Eng.2017,, 2017, pp. 1221-1225.
[112]
Wey, T.A.; Jemison, W.D. Variable gain amplifier circuit using titanium dioxide memristors. IET Circuits Dev. Syst., 2011, 5(1), 59-65.
[http://dx.doi.org/10.1049/iet-cds.2010.0210]
[113]
Wey, T.; Jemison, W. An automatic gain control circuit with TiO2 memristor variable gain amplifier. Proc. IEEE Int. NEWCAS Conf.2010,, 2010, pp. 49-52.
[http://dx.doi.org/10.1109/NEWCAS.2010.5603719]]
[114]
Olumodeji, O.A.; Gottardi, M. Memristor-based comparator with programmable hysteresis. Conf. Ph.D. Res. Microelectron. Electron., 2015, 2015, 232-235.
[http://dx.doi.org/10.1109/PRIME.2015.7251377]
[115]
Mosad, A.G.; Fouda, M.E.; Khatib, M.A.; Salama, K.N.; Radwan, A.G. Improved memristor-based relaxation oscillator. Microelectronics J., 2013, 44(9), 814-820.
[http://dx.doi.org/10.1016/j.mejo.2013.04.005]
[116]
Jo, S.H.; Chang, T.; Ebong, I.; Bhadviya, B.B.; Mazumder, P.; Lu, W. Nanoscale memristor device as synapse in neuromorphic systems. Nano Lett., 2010, 10(4), 1297-1301.
[http://dx.doi.org/10.1021/nl904092h] [PMID: 20192230]
[117]
Kvatinsky, S.; Satat, G.; Wald, N.; Friedman, E.G.; Kolodny, A.; Weiser, U.C. Memristor-based material implication (IMPLY). Logic: Design principles and methodologies. IEEE Trans. Very Large Scale Integr. Syst., 2014, 22(10), 2054-2066.
[118]
Kvatinsky, S.; Wald, N.; Satat, G.; Kolodny, A.; Weiser, U.C.; Friedman, E.G. MRL - Memristor ratioed logic. Int. Workshop Cell. Nanoscale Networks Applicat.2012,, 2012, pp. 1-6.
[119]
Zhang, Y.; Shen, Y.; Wang, X.; Cao, L. A novel design for memristor-based logic switch and crossbar circuits. IEEE Trans. Circuits Syst. I Regul. Pap., 2015, 62(5), 1402-1411.
[http://dx.doi.org/10.1109/TCSI.2015.2407436]
[120]
Stathopoulos, S.; Khiat, A.; Trapatseli, M.; Cortese, S.; Serb, A.; Valov, I.; Prodromakis, T. Multibit memory operation of metal-oxide bi-layer memristors. Sci. Rep., 2017, 7(1), 17532.
[http://dx.doi.org/10.1038/s41598-017-17785-1] [PMID: 29235524]
[121]
Park, J.; Biju, K.P.; Jung, S.; Lee, W.; Lee, J.; Kim, S.; Park, S.; Shin, J.; Hwang, H. Multibit operation of TiOx-based ReRAM by schottky barrier height engineering. IEEE Electron Device Lett., 2011, 32(4), 476-478.
[http://dx.doi.org/10.1109/LED.2011.2109032]
[122]
Lee, S.R.; Kim, Y.B.; Chang, M.; Kim, K.M.; Lee, C.B.; Hur, J.H.; Park, G.S.; Lee, D.; Lee, M.J.; Kim, C.J. Multi-level switching of triple-layered TaOxRRAM with excellent reliability for storage class memory. Dig. Tech. Pap. Symp. VLSI Technol., 2011, 2012(52), 71-72.
[123]
Zhao, L.; Chen, H.Y.; Wu, S.C.; Jiang, Z.; Yu, S.; Hou, T.H.; Wong, H.S.P.; Nishi, Y. Multi-level control of conductive nano-filament evolution in HfO2 ReRAM by pulse-train operations. Nanoscale, 2014, 6(11), 5698-5702.
[http://dx.doi.org/10.1039/C4NR00500G] [PMID: 24769626]
[124]
Prakash, A.; Deleruyelle, D.; Song, J.; Bocquet, M.; Hwang, H. Resistance controllability and variability improvement in a TaOx-based resistive memory for multilevel storage application. Appl. Phys. Lett., 2015, 106(23), 1-4.
[http://dx.doi.org/10.1063/1.4922446]

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