Login Register Cart 0
Generic placeholder image

Recent Advances in Electrical & Electronic Engineering

Editor-in-Chief

ISSN (Print): 2352-0965
ISSN (Online): 2352-0973

Back
Journal Home About Journal Editorial Board Journal Insight Current Issue Volumes/Issues
Subscribe
Research Article

Implementation of Barrier Sensing and Avoidance System on FPGA for a Wheeled Robot

Author(s): Sandipan Pine* and Bibhuti Bhusan Choudhury

Volume 15, Issue 4, 2022

Published on: 19 August, 2022

Page: [301 - 308] Pages: 8

DOI: 10.2174/2352096515666220512115747

Price: $65

conference banner
Abstract

Aims: This paper describes the process of spotting a barrier on the path of a wheeled robot to find an alternate way of avoiding it.

Methods: For path planning, an image-processing technique is used, and for the barrier-sensing and avoidance system, an ultrasonic sensor is used. FPGA board processes the sensor output, and after processing, it instructs the motor arrangement to control the speed and direction of the wheeled robot.

Results: We took one digital storage oscilloscope to collect the data from the sensor board. Although the color and lumen of the reflection matter a lot in the reading, various objects were selected to reduce the probability of error. A Very High-Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) block is generated to control the algorithm and is connected with an enabled pin. The calculation block and the ADC have been illustrated. As the FPGA board reads a digital signal, we converted the received signal to digital with the help of an ADC of type NS ADC128S022. It is a 12-bit converter. Initially, we kept bigger particles in front of the sensor to understand and quantify its highest scope. DSO is used to view the response of both the pulse and the analog signal. The code, which we have written for the operation of the ultrasonic sensor, used a high logic of 10 μs width for triggering the input. The program measures the object distance by calculating the logic high time of the ECHO pin we have programmed as input. For servo operation, a pulse was detected in 1.5ms over a 20-millisecond time-period. To change the rotating angle, we adopted different on time.

Conclusion: Wheeled robots have a number of applications. Depending on what sensors, actuators or microprocessors are applied, the response time differs from one model to the other. A robot should respond very quickly to the signals in real-time applications. In a realistic approach, the FPGA development board has been widely used in robot models because of its fast response time, flexible system approach, quick generation of signals, parallel processing ability, and very low cost compared to other processors.

Keywords: Wheeled robot, FPGA, barrier sensing, vertex-5, robot control, path planning.

« Previous Next »
Graphical Abstract

[1]
L. Li, and A.M. Wyrwicz, "Design of an MR image processing module on an FPGA chip", J. Magn. Reson., vol. 255, pp. 51-58, 2015.
[http://dx.doi.org/10.1016/j.jmr.2015.03.007] [PMID: 25909646]
[2]
V. Elamaran, A. Aswini, V. Niraimathi, and D. Kokilavani, "FPGA Implementation of audio enhancement using adaptive LMS Filters", J. Artif. Intell., vol. 5, no. 4, pp. 221-226, 2012.
[3]
Q.P. Ha, Y.H. Yu, and N.K. Quang, "FPGA-based cooperative control of indoor multiple robots", Int. J. Adv. Mechatron. Syst., vol. 4, no. 5-6, pp. 248-259, 2012.
[http://dx.doi.org/10.1504/IJAMECHS.2012.052220]
[4]
A. Irwansyah, O.W. Ibraheem, J. Hagemeyer, M. Porrmann, and U. Rueckert, "FPGA-based multi-robot tracking", J. Parallel Distrib. Comput., vol. 107, pp. 146-161, 2017.
[http://dx.doi.org/10.1016/j.jpdc.2017.03.008]
[5]
S. Commuri, V. Tadigotla, and L. Sliger, "Task-based hardware reconfiguration in mobile robots using FPGAs", J. Intell. Robot. Syst., vol. 49, no. 2, pp. 111-134, 2007.
[http://dx.doi.org/10.1007/s10846-007-9131-3]
[6]
S.D. Brown, and Z.G. F. Rose, "Rose, and Vranesic, Field-Programmable Gate Array. Kluwer Academic Publishers,", 1997
[7]
J. Zhao, S. Zhu, and X. Huang, "Real-time traffic sign detection using surf features on FPGA In", 2013 IEEE High Performance Extreme Computing Conference (HPEC), 10-12 Sept, 2013. Waltham, MA: USA, 2013, pp. 1-6.
[8]
A. Kumar, P. Rastogi, and P. Srivastava, "Design and FPGA implementation of DWT, image text extraction technique", Procedia Comput. Sci., vol. 57, pp. 1015-1025, 2015.
[http://dx.doi.org/10.1016/j.procs.2015.07.512]
[9]
V. Maxim, and K. Zidek, "Design of high performance multimedia control system for UAV/UGV based on SoC/FPGA Core", Procedia Eng., vol. 48, pp. 402-408, 2012.
[http://dx.doi.org/10.1016/j.proeng.2012.09.532]
[10]
M. Lopez-Ramirez, L.M. Ledesma-Carrillo, E. Cabal-Yepez, G. Botella, C. Rodriguez-Donate, and S. Ledesma, "FPGA-based methodolo-gy for depth-of-field extension in a single image", Digit. Signal Process., vol. 70, no. C, pp. 14-23, 2017.
[http://dx.doi.org/10.1016/j.dsp.2017.07.014]
[11]
A.S. Dawood, S.J. Visser, and J.A. In Williams, 2002 14th International Conference on Digital Signal Processing Proceedings. DSP 2002 (Cat. No. 02TH8628), 1-3 July 2002. Santorini, Greece, vol. 2pp. 845-848, 2002
[12]
"S. AllinChriste, and A. Kandaswamy, “An efficient FPGA implementation Of MRI image filtering and tumour characterization using Xilinx system generator”", Int. J. of VLSI Des. Commun. Syst., vol. 2, no. 4, pp. 1-15, 2011.
[13]
B. Belean, M. Borda, B. Le Gal, and R. Terebes, "FPGA based system for automatic cDNA microarray image processing", Comput. Med. Imaging Graph., vol. 36, no. 5, pp. 419-429, 2012.
[http://dx.doi.org/10.1016/j.compmedimag.2012.01.002] [PMID: 22424667]
[14]
P. Turcza, and M. Duplaga, "Low power FPGA-based image processing core for wireless capsule endoscopy", Sens. Actuators A Phys., vol. 172, no. 2, pp. 552-560, 2011.
[http://dx.doi.org/10.1016/j.sna.2011.09.026]
[15]
J. Nieto, D. Sanz, P. Guillén, S. Esquembri, G. de Arcas, M. Ruiz, J. Vega, and R. Castro, "High performance image acquisition and pro-cessing architecture for fast plant system controllers based on FPGA and GPU", Fusion Eng. Des., vol. 112, pp. 957-960, 2016.
[http://dx.doi.org/10.1016/j.fusengdes.2016.04.004]
[16]
T. Zarifi, and M. Malek, "FPGA implementation of image processing technique for blood samples characterization", Comput. Electr. Eng., vol. 40, no. 5, pp. 1750-1757, 2014.
[http://dx.doi.org/10.1016/j.compeleceng.2013.07.007]
[17]
Y. Yu, N. Kwok, and Q.P. Ha, "FGPA-based real-time color tracking for robotic formation control in International Symposium on Automation and Robotics in Construction 2009. IAARCUniversity of Texas at Austin",
[18]
J. Horanzy, Method and apparatus for configuring a programmable logic device. U.S. Patent 7,146,598, 2006
[19]
O. Sims, Efficient implementation of video processing algorithms on FPGA. (Doctoral dissertation, University of Glasgow), 2007.
[20]
C. Chang, "Design and applications of a reconfigurable computing system for high performance digital signal processing", (Doctoral dissertation, University of California, Berkeley), 2005.
[21]
J. Kotyza, and V. Kasik, "Image processing of composite video with FPGA programmable logic", IFAC-PapersOnLine, vol. 49, no. 25, pp. 482-486, 2016.
[http://dx.doi.org/10.1016/j.ifacol.2016.12.078]

Rights & Permissions Print Cite
Article Metrics
3
© 2024 Bentham Science Publishers | Privacy Policy