Login Register Cart 0
Generic placeholder image

Micro and Nanosystems

Editor-in-Chief

ISSN (Print): 1876-4029
ISSN (Online): 1876-4037

Back
Journal Home About Journal Editorial Board Journal Insight Current Issue Volumes/Issues
Subscribe
Research Article

Utilization of LTEx Feynman Gate in Designing the QCA Based Reversible Binary to Gray and Gray to Binary Code Converters

Author(s): Chiradeep Mukherjee*, Saradindu Panda, Asish K. Mukhopadhyay and Bansibadan Maji

Volume 12, Issue 3, 2020

Page: [187 - 200] Pages: 14

DOI: 10.2174/1876402912666200127162526

Abstract

Aims: The Quantum-dot Cellular Automata explores a unique perspective in the arena of the architectural design of future quantum computers, precisely due to its ultra-low packing density, high operating speed, and low power dissipation. On the other side, reversible computing allows the implementation of extreme low power-consuming circuits by avoiding energy dissipation during the time of computation.

Objective: In this paper, we have explored the QCA design of reversible binary to gray and gray to binary code converters based on the application of a unique model of Feynman gate using the layered T exclusive-OR module (abbreviated in this work as LTEx Feynman gate).

Methods: We have proposed algorithms to produce multi-control reversible binary to gray and gray to binary code converters and to develop cost-efficient QCA layouts.

Results: Our systematic literature survey on the existing QCA designs of reversible binary to gray and gray to binary code converters helped us to compare and analyze the proposed design with the existing ones and identify it as the best design in terms of reversible, and QCA design metrics.

Conclusion: Significant improvements in design metrics owing to successful experimentations over the previous designs are reported while instantiating 3X3,4X4, and 8X8 counterpart layouts.

Keywords: Quantum-dot cellular automata, layered T (LT) gate, feynman gate, reversible logic, LTEx module, reversible binary to gray and gray to binary converter, cost function.

« Previous Next »
Graphical Abstract

[1]
Huang, R.; Wu, H.; Kang, J.; Xiao, D.; Shi, X.; An, X.; Tian, Y.; Wang, R.; Zhang, L.; Zhang, X.; Wang, Y. Challenges of 22 nm and beyond CMOS technology. Sci. China Series F: Info. Sci., 2009, 52, 1491-1533.
[http://dx.doi.org/10.1007/s11432-009-0167-9]
[2]
Landauer, R. Irreversibility and heat generation in the computing process. IBM J. Res. Develop., 1961, 5(3), 183-191.
[http://dx.doi.org/10.1147/rd.53.0183]
[3]
Bennett, C.H. Notes on Landauer’s principle, reversible computation and Maxwell’s demon. Stud. Hist. Phil. Mod. Phys., 2003, 34(3), 501-510.
[http://dx.doi.org/10.1016/S1355-2198(03)00039-X]
[4]
Ladd, T.D.; Jelezko, F.; Laflamme, R.; Nakamura, Y.; Monroe, C.; O’Brien, J.L. Quantum computers. Nature, 2010, 464(7285), 45-53.
[http://dx.doi.org/10.1038/nature08812] [PMID: 20203602]
[5]
Perumalla, K.S. Introduction to Reversible Computing; CRC Press: Boca Rotan, FL, USA, 2013.
[http://dx.doi.org/10.1201/b15719]
[6]
Khajetoorians, A.A.; Wiebe, J.; Chilian, B.; Wiesendanger, R. Realizing all-spin-based logic operations atom by atom. Science, 2011, 332(6033), 1062-1064.
[http://dx.doi.org/10.1126/science.1201725] [PMID: 21551029]
[7]
Nielsen, M.A.; Chuang, I.L. Quantum Computation and Quantum Information. 10th Anniversary ed.; Cambridge University Press., , 2010. eISBN: 9781107002173
[8]
Toth, G.; Lent, C. Quantum computing with quantum-dot cellular automata. Phys. Rev. A, 2001, 63, 1-9.
[http://dx.doi.org/10.1103/PhysRevA.63.052315]
[9]
Sen, B.; Dutta, M.; Goswami, M.; Sikdar, B.K. Modular design of testable reversible ALU by QCA multiplexer with increase in pro-grammability. Microelectronics J., 2014, 45(11), 1522-1532.
[http://dx.doi.org/10.1016/j.mejo.2014.08.012]
[10]
Misra, N.K.; Wairya, S.; Sen, B. Design of conservative, reversible sequential logic for cost efficient emerging nano circuits with enhanced testability. Ain Shams Eng. J., 2018, 9(4), 2027-2037.
[http://dx.doi.org/10.1016/j.asej.2017.02.005]
[11]
Singh, G.; Sarin, R.K.; Raj, B. Design and analysis of area efficient QCA based reversible logic gates. Microprocess. Microsyst., 2017, 52(C), 59-68.
[http://dx.doi.org/10.1016/j.micpro.2017.05.017]
[12]
Orlov, A.O.; Amlani, I.; Bernstein, G.H.; Lent, C.S.; Snider, G.L. Realization of a functional cell for quantum-dot cellular automata. Science, 1997, 277(5328), 928-930.
[http://dx.doi.org/10.1126/science.277.5328.928]
[13]
Momenzadeh, M.; Huang, J.; Tahoori, M.B.; Lombardi, F. Characterization, test, and logic synthesis of And-Or-Inverter (AOI) gate design for QCA implementation. IEEE Trans. Comput. Aided Des. Integrated Circ. Syst., 2005, 24(12), 1881-1893.
[http://dx.doi.org/10.1109/TCAD.2005.852667]
[14]
Sen, B.; Sengupta, A.; Dalui, M.; Sikdar, B.K. Design of universal logic gate targeting minimum wire-crossings in QCA logic circuit 53rd IEEE International Midwest Symposium on Circuits and Systems, Seattle, WA, August 2010, pp. 1181-1184.
[http://dx.doi.org/10.1109/MWSCAS.2010.5548873]
[15]
Mukherjee, C.; Panda, S.; Mukhopadhyay, A.K.; Maji, B. Synthesis of standard functions and generic Ex-OR module using layered T gate. Int. J. High Perf. Syst. Arch., 2010, 7(2), 70-86.
[http://dx.doi.org/10.1504/IJHPSA.2017.087164]
[16]
Almatrood, A.F.; Singh, H. QCA circuit design of n-bit non-restoring binary array divider. J. Eng. (Stevenage), 2018, 2018(7), 348-353.
[http://dx.doi.org/10.1049/joe.2017.0375]
[17]
Ghosh, B.; Chandra, J.S.; Salimath, A.K. Design of a multi-layered QCA configurable logic block for FPGAs. J. Circuits Syst. Comput., 2014, 23(06)1450089
[http://dx.doi.org/10.1142/S0218126614500893]
[18]
Mukherjee, C.; Panda, S.; Mukhopadhyay, A.K.; Maji, B. QCA gray code converter circuits using LTEx methodology. Int. J. Theor. Phys., 2018, 57(7), 2068-2092.
[http://dx.doi.org/10.1007/s10773-018-3732-4]
[19]
Mukherjee, C.; Panda, S.; Mukhopadhyay, A.K.; Maji, B. Generic parity generators design using LTEx methodology: A quantum-dot cellular automata based approach. Int. J. Nanodimens., 2018, 9(3), 215-227.
[20]
Mukherjee, C.; Panda, S.; Mukhopadhyay, A.K.; Maji, B. Towards the design of cost-efficient generic register using quantum-dot cellular automata. Nanosci. Nanotechnol. Asia, 2019, 9(1)
[http://dx.doi.org/10.2174/2210681209666190412142207]
[21]
Mukherjee, C.; Panda, S.; Mukhopadhyay, A.K.; Maji, B. Introducing Galois field polynomial addition in quantum-dot cellular automata. Appl. Nanosci., 2019, 1-20.
[http://dx.doi.org/10.1007/s13204-019-01045-x]
[22]
Liu, W.; Lu, L.; O’Neill, M.; Swartzlander, E.E. A first step toward cost functions for Quantum-Dot Cellular Automata Designs. IEEE Trans. NanoTechnol., 2014, 13(3), 476-487.
[http://dx.doi.org/10.1109/TNANO.2014.2306754]
[23]
Misra, N.K.; Sen, B.; Wairya, S. Towards designing efficient reversible binary code converters and a dual-rail checker for emerging nanocircuits. J. Comput. Electron., 2017, 16(2), 442-458.
[http://dx.doi.org/10.1007/s10825-017-0960-4]
[24]
Mukherjee, C; Panda, S; Mukhopadhyay, A. K.; Maji, B. QCA realization of reversible gates using layered T logic reduction technique. 2019 Devices for Integrated Circuit (DevIC) 2019.
[25]
Biswas, P.; Gupta, N.; Patidar, N. Basic reversible logic gates and its QCA implementation. Int. J. Eng. Res. Appl., 2014, 4(6), 12-16.
[26]
Das, J.C.; De, D. Reversible binary to gray and gray to binary code converter using QCA. J. Inst. Electron. Telecommun. Eng., 2015, 61(3), 223-229.
[http://dx.doi.org/10.1080/03772063.2015.1018845]
[27]
Shafi, A.; Shifatul, M.; Bahar, A.N. A review on reversible logic gates and its QCA implementation. Int. J. Comput. Appl., 2015, 128(2), 27-34.
[28]
Das, J.C.; De, D. Quantum-dot cellular automata based reversible low power party generator and party checker design for nanocom-munication. Front. Info. Tech. Electron. Eng., 2016, 17(2), 224-236.
[http://dx.doi.org/10.1631/FITEE.1500079]
[29]
Bahar, A.N.; Waseed, S.; Habib, M.A. A novel presentation of reversible logic gate in Quantum-dot Cellular Automata (QCA). International Conference on Electrical Engineering and Information & Communication Technology, Dhaka, Bangladesh2014, pp. 1-6.
[30]
Kunalan, D.; Cheong, C.L.; Chau, C.F.; Ghazali, A.B. Design of a 4-bit adder using reversible logic in Quantum-Dot Cellular Automata (QCA); IEEE International on Semiconductor Electronics: Kuala Lumpur, 2014, pp. 60-63.
[http://dx.doi.org/10.1109/SMELEC.2014.6920795]
[31]
Chaves, J.F.; Silva, D.S.; Camargos, V.V.; Neto, O.P.V. Towards reversible QCA computers: Reversible gates and ALU. 2015 IEEE 6th Latin American Symposium on Circuits & Systems (LASCAS), Montevideo, 2015, pp. 1-4.
[http://dx.doi.org/10.1109/LASCAS.2015.7250458]
[32]
Misra, N.K.; Wairya, S.; Singh, V.K. Optimized approach for reversible code converters using Quantum Dot Cellular Automata. Proceedings of the 4th International Conference on Frontiers in Intelligent Computing: Theory and Applications (FICTA) : Springer, New Delhi,, 2015, 367-378.
[33]
Reshi, J.I.; Banday, M.T. Efficient design of reversible code converters using Quantum Dot Cellular Automata. J. Nano Electron. Phys., 2016, 8(2), 02042.
[http://dx.doi.org/10.21272/jnep.8(2).02042]
[34]
QCA Designer, Available from: www.atips.ca/projects/qcadesigner Accessed on May 26, 2019
[35]
Janez, M.; Pecar, P.; Mraz, M. Layout design of manufacturable Quantum-Dot Cellular Automata. Microelectronics J., 2012, 43, 501-513.
[http://dx.doi.org/10.1016/j.mejo.2012.03.007]
[36]
DiLabio, G.A.; Wolkow, R.A.; Pitters, J.L.; Piva, P.G. Atomistic quantum dot. U.S. Patent 8,816,479, 2014.

Rights & Permissions Print Cite
Article Metrics
18
1
© 2024 Bentham Science Publishers | Privacy Policy